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Volumn , Issue , 2010, Pages 277-286

Applying statistical machine learning to multicore voltage & frequency scaling

Author keywords

decision tree; multicore; power management

Indexed keywords

BENCHMARK SUITES; BEST FREQUENCY; CORE MACHINES; DYNAMIC VOLTAGE/FREQUENCY SCALING; EXPECTED ENERGY; FIXED FREQUENCY; FREQUENCY SETTING; FREQUENCY-SCALING; GREEDY POLICY; IMPROVING SYSTEMS; LIMITING FACTORS; MACHINE-LEARNING; MULTI CORE; MULTICORE CHIPS; MULTITHREADED; POWER MANAGEMENT; POWER MANAGEMENTS;

EID: 77954522407     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1787275.1787336     Document Type: Conference Paper
Times cited : (33)

References (18)
  • 1
    • 49949085209 scopus 로고    scopus 로고
    • Integrated cpu cache power management in multiple clock domain processors
    • Nevine AbouGhazaleh, Bruce R. Childers, Daniel Mossé, and Rami G. Melhem. Integrated cpu cache power management in multiple clock domain processors. In HiPEAC, pages 209-223, 2008.
    • (2008) HiPEAC , pp. 209-223
    • AbouGhazaleh, N.1    Childers, B.R.2    Mossé, D.3    Melhem, R.G.4
  • 2
    • 63549095070 scopus 로고    scopus 로고
    • The parsec benchmark suite: Characterization and architectural implications
    • Christian Bienia, Sanjeev Kumar, Jaswinder Pal Singh, and Kai Li. The parsec benchmark suite: characterization and architectural implications. In PACT, pages 72-81, 2008.
    • (2008) PACT , pp. 72-81
    • Bienia, C.1    Kumar, S.2    Singh, J.P.3    Li, K.4
  • 3
    • 0034427485 scopus 로고    scopus 로고
    • A static power model for architects
    • J. Adam Butts and Gurindar S. Sohi. A static power model for architects. In MICRO, pages 191-201, 2000.
    • (2000) MICRO , pp. 191-201
    • Butts, J.A.1    Sohi, G.S.2
  • 4
    • 36949025660 scopus 로고    scopus 로고
    • Dynamic voltage frequency scaling for multi-tasking systems using online learning
    • Gaurav Dhiman and Tajana Simunic Rosing. Dynamic voltage frequency scaling for multi-tasking systems using online learning. In ISLPED, pages 207-212, 2007.
    • (2007) ISLPED , pp. 207-212
    • Dhiman, G.1    Rosing, T.S.2
  • 7
    • 33746283629 scopus 로고    scopus 로고
    • Exploring the energy-time tradeoff in mpi programs on a power-scalable cluster
    • Vincent W. Freeh, Feng Pan, Nandini Kappiah, David K. Lowenthal, and Robert Springer. Exploring the energy-time tradeoff in mpi programs on a power-scalable cluster. In IPDPS, 2005.
    • (2005) IPDPS
    • Freeh, V.W.1    Pan, F.2    Kappiah, N.3    Lowenthal, D.K.4    Springer, R.5
  • 9
    • 36949040798 scopus 로고    scopus 로고
    • Analysis of dynamic voltage/frequency scaling in chip-multiprocessors
    • Sebastian Herbert and Diana Marculescu. Analysis of dynamic voltage/frequency scaling in chip-multiprocessors. In ISLPED, pages 38-43, 2007.
    • (2007) ISLPED , pp. 38-43
    • Herbert, S.1    Marculescu, D.2
  • 10
    • 64949121794 scopus 로고    scopus 로고
    • Variation-aware dynamic voltage/frequency scaling
    • Sebastian Herbert and Diana Marculescu. Variation-aware dynamic voltage/frequency scaling. In HPCA, pages 301-312, 2009.
    • (2009) HPCA , pp. 301-312
    • Herbert, S.1    Marculescu, D.2
  • 12
    • 57649233064 scopus 로고    scopus 로고
    • Seeking information in realistic books: A user study
    • Veronica Liesaputra and Ian H. Witten. Seeking information in realistic books: a user study. In JCDL, pages 29-38, 2008.
    • (2008) JCDL , pp. 29-38
    • Liesaputra, V.1    Witten, I.H.2
  • 13
    • 0037670434 scopus 로고    scopus 로고
    • Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor
    • Grigorios Magklis, Michael L. Scott, Greg Semeraro, David H. Albonesi, and Steve Dropsho. Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor. In ISCA, pages 14-25, 2003.
    • (2003) ISCA , pp. 14-25
    • Magklis, G.1    Scott, M.L.2    Semeraro, G.3    Albonesi, D.H.4    Dropsho, S.5
  • 14
    • 0004255908 scopus 로고    scopus 로고
    • McGraw-Hill, international edition
    • Tom M. Mitchell. Machine Learning. McGraw-Hill, international edition, 1997.
    • (1997) Machine Learning
    • Mitchell, T.M.1
  • 16
    • 43949122214 scopus 로고    scopus 로고
    • Compiler control power saving scheme for multi core processors
    • Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, and Hironori Kasahara. Compiler control power saving scheme for multi core processors. In LCPC, pages 362-376, 2005.
    • (2005) LCPC , pp. 362-376
    • Shirako, J.1    Oshiyama, N.2    Wada, Y.3    Shikano, H.4    Kimura, K.5    Kasahara, H.6
  • 17
    • 77954520002 scopus 로고    scopus 로고
    • Simics. http://www.simics.net/.
    • Simics
  • 18
    • 52649107085 scopus 로고    scopus 로고
    • Variation-aware application scheduling and power management for chip multiprocessors
    • Radu Teodorescu and Josep Torrellas. Variation-aware application scheduling and power management for chip multiprocessors. In ISCA, pages 363-374, 2008.
    • (2008) ISCA , pp. 363-374
    • Teodorescu, R.1    Torrellas, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.