Interval-based models for run-time DVFS orchestration in superscalar processors

CF 2010 - Proceedings of the 2010 Computing Frontiers Conference

Volumn , Issue , 2010, Pages 287-296

  Keramidas, Georgios ^a   Spiliopoulos, Vasileios ^b   Kaxiras, Stefanos ^b  

^a INDUSTRIAL SYSTEMS INSTITUTE   (Greece)

^b UNIVERSITY OF PATRAS   (Greece)

Author keywords

dynamic voltage and frequency scaling; performance and power modeling; superscalar out of order processors

Indexed keywords

AVERAGE ERRORS; CYCLE-ACCURATE SIMULATORS; DYNAMIC VOLTAGE AND FREQUENCY SCALING; HARDWARE COST; INSTRUCTION WINDOWS; OUT-OF-ORDER PROCESSORS; PERFORMANCE CONSTRAINTS; POWER CONSUMPTION; POWER MODELING; PROGRAM EXECUTION; RUNTIMES; STEADY STATE; SUPERSCALAR; SUPERSCALAR PROCESSOR;

ERRORS;

EMBEDDED SYSTEMS;

EID: 77954473092     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1787275.1787338     Document Type: Conference Paper

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