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Volumn , Issue , 2010, Pages 850-855

Low power state assignment using ILP techniques

Author keywords

Boolean Satisfiability; Integer Linear Programming; Power; State assignment

Indexed keywords

ASSIGNMENT PROBLEMS; BENCHMARK CIRCUIT; BOOLEAN SATISFIABILITY; FINITE STATE MACHINES; INTEGER LINEAR PROGRAMMING; LOW POWER; LOW POWER STATE; OPTIMIZATION PROBLEMS; POWER STATE; SEARCH PROCESS; STATE TRANSITIONS; SWITCHING ACTIVITIES;

EID: 77954289408     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MELCON.2010.5475949     Document Type: Conference Paper
Times cited : (6)

References (31)
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  • 16
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    • (2004) Proc. of ProRISC
    • Eggermont, R.1    Cotofana, S.2    Lageweg, C.3
  • 19
    • 0012024683 scopus 로고    scopus 로고
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  • 23
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    • June
    • G. Nam, F. A. Aloul, K. A. Sakallah, and R. Rutenbar, "A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints", in IEEE Transactions on Computers, 53(6), 688-696, June 2004.
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  • 27
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    • K. Pipatsrisawat and A. Darwiche, "RSat 2.0: SAT Solver Description," Technical report D153. Automated Reasoning Group, Computer Science Department, University of California, Los Angeles, 2007.
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  • 28
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    • Using SAT-based techniques in power estimation
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.