A performance prediction model for the CUDA GPGPU platform

16th International Conference on High Performance Computing, HiPC 2009 - Proceedings

Volumn , Issue , 2009, Pages 463-472

  Kothapalli, Kishore ^a   Mukherjee, Rishabh ^a   Suhail Rehman, M ^a   Patidar, Suryakant ^a   Narayanan, P J ^a   Srinathan, Kannan ^a  

^a INTERNATIONAL INSTITUTE OF INFORMATION TECHNOLOGY   (India)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL POWER; COMPUTING PLATFORM; GENERAL PURPOSE PROGRAMMING; GRAPHICS PROCESSING UNITS; MATRIX MULTIPLICATION; MEMORY ACCESS; MEMORY HIERARCHY; PARALLEL COMPUTING PLATFORM; PERFORMANCE MODEL; PERFORMANCE PREDICTION; PSEUDO CODES;

ASYMPTOTIC ANALYSIS; MATHEMATICAL MODELS; PARALLEL ARCHITECTURES;

PROGRAM PROCESSORS;

EID: 77952204218     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HIPC.2009.5433179     Document Type: Conference Paper

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