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Volumn 5336 LNCS, Issue , 2008, Pages 430-443
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Memory locality exploitation strategies for FFT on the CUDA architecture
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Author keywords
Compute Unified Device Architecture (CUDA); Fast fourier transform; Graphics Processing Unit (GPU); Memory reference locality
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Indexed keywords
DATA STORAGE EQUIPMENT;
DIGITAL ARITHMETIC;
FAST FOURIER TRANSFORMS;
HIGH PERFORMANCE LIQUID CHROMATOGRAPHY;
IMAGE CODING;
COMMODITY PROCESSORS;
COMPUTATIONAL POWERS;
COMPUTE UNIFIED DEVICE ARCHITECTURE (CUDA);
EXECUTION MODELS;
EXECUTION PERFORMANCES;
GRAPHICS PLATFORMS;
GRAPHICS PROCESSING UNIT (GPU);
MEMORY HIERARCHIES;
MEMORY LOCALITIES;
MEMORY REFERENCE LOCALITY;
PROGRAMMING MODELS;
FOURIER TRANSFORMS;
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EID: 58349086140
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/978-3-540-92859-1_39 Document Type: Conference Paper |
Times cited : (15)
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References (10)
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