An 18b 12.5MHz ADC with 93dB SNR

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 378-379

  Peter Hurrell, Chistopher ^a   Lyden, Colin ^b   Laing, David ^a   Hummerston, Derek ^a   Vickery, Mark ^a  

^a Analog Devices Inc UK   (United Kingdom)

^b ANALOG DEVICES   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

CONVERSION RATES; DYNAMIC RANGE; FLASH CONVERTERS; LOW RESOLUTION; MULTIPLE CHANNELS; PHOTODIODE ARRAYS; SA ALGORITHM; SUCCESSIVE APPROXIMATIONS; TRIAL SPACE;

APPROXIMATION THEORY;

MEDICAL IMAGING;

EID: 77952191685     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433829     Document Type: Conference Paper

References (4)

1. Fernandes, J.; Lewis, S.R.; Mallinson, A.M.; Miller, G.A. "A 14-bit 10-us Subranging A/D Converter with S/H"; Solid-State Circuits, IEEE J. Solid-State Circuits; Vol. 23, No 6, pp. 1309 - 1315 Dec. 1988
2. Zhiheng Cao, Shouli Yan, Yunchu Li "A 32mW 1.25GS/s 6b 2b/step SAR ADC in 0.13uM CMOS". Proc IEEE ISSCC, pp. 542-543, February 6, 2008
3. Jingua Li, Franco Maloberti "Pipeline of successive approximation converters with optimal power merit factor" Proc IEEE Electronic Circuits and Systems, pp. 17-20, September 2002
4. Khosrov Dabbagh-Sadeghipour, Khayrollah Hadidi, Abdollah Khoei "A New Architecture for Area and Power Efficient, High Conversion Rate Successive Approximation ADCs" Proc IEEE 2nd annual IEEE Northeast workshop on circuits and systems, pp. 253-256, 2004.