A 65nm CMOS 2.4GHz 31.5dBm power amplifier with a distributed LC power-combining network and improved linearization for WLAN applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 452-453

  Afsahi, Ali ^a,b   Behzad, Arya ^b   Larson, Lawrence E ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

802.11G; ADVANCED APPLICATIONS; BREAKDOWN VOLTAGE; CMOS PA; CMOS PROCESSS; HIGH EFFICIENCY; HIGH-DEFINITION VIDEOS; HIGH-POWER; LONG DISTANCES; LOSSY SUBSTRATE; LOW POWER SUPPLY; MULTIPLE STREAMS; OFDM MODULATION; ON CHIPS; OUTPUT POWER; PEAK-TO-AVERAGE RATIO; POWER COMBINING; TRANSMIT POWER; WLAN APPLICATIONS;

LINEARIZATION; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; POWER AMPLIFIERS; WIRELESS LOCAL AREA NETWORKS (WLAN);

CMOS INTEGRATED CIRCUITS;

EID: 77951672888     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433961     Document Type: Conference Paper

References (7)

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