-
1
-
-
0342984573
-
Algorithms and accuracy in the HP-35
-
Cochran D. S., Algorithms and accuracy in the HP-35 Hewlett-Packard Journal 1972 23 10
-
(1972)
Hewlett-Packard Journal
, vol.23
, Issue.10
-
-
Cochran, D.S.1
-
3
-
-
84919346176
-
The CORDIC trigonometric computing technique
-
Volder J. E., The CORDIC trigonometric computing technique IRE Transactions on Electronic Computers 1959 8 3 330 334
-
(1959)
IRE Transactions on Electronic Computers
, vol.8
, Issue.3
, pp. 330-334
-
-
Volder, J.E.1
-
6
-
-
0342550192
-
Pseudo division and pseudo multiplication processes
-
Meggitt J. E., Pseudo division and pseudo multiplication processes IBM Journal 1962 6 2 210 226
-
(1962)
IBM Journal
, vol.6
, Issue.2
, pp. 210-226
-
-
Meggitt, J.E.1
-
10
-
-
0026898138
-
CORDIC-based VLSI architectures for digital signal processing
-
Hu Y. H., CORDIC-based VLSI architectures for digital signal processing IEEE Signal Processing Magazine 1992 9 3 16 35
-
(1992)
IEEE Signal Processing Magazine
, vol.9
, Issue.3
, pp. 16-35
-
-
Hu, Y.H.1
-
11
-
-
0024123916
-
Optimal floating-point pipeline CMOS CORDIC processor
-
June
-
de Lange A. A. J., van der Hoeven A. J., Deprettere E. F., Bu J., Optimal floating-point pipeline CMOS CORDIC processor 3 Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 88) June 1988 2043 2047
-
(1988)
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 88)
, vol.3
, pp. 2043-2047
-
-
De Lange, A.A.J.1
Van Der Hoeven, A.J.2
Deprettere, E.F.3
Bu, J.4
-
13
-
-
0025472418
-
A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms
-
Metafas D. E., Goutis C. E., A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms Microprocessing and Microprogramming 1990 30 15 51 57
-
(1990)
Microprocessing and Microprogramming
, vol.30
, Issue.15
, pp. 51-57
-
-
Metafas, D.E.1
Goutis, C.E.2
-
14
-
-
0026220254
-
A programmable CORDIC chip for digital signal processing applications
-
Timmermann D., Hahn H., Hosticka B. J., Schmidt G., A programmable CORDIC chip for digital signal processing applications IEEE Journal of Solid-State Circuits 1991 26 9 1317 1321
-
(1991)
IEEE Journal of Solid-State Circuits
, vol.26
, Issue.9
, pp. 1317-1321
-
-
Timmermann, D.1
Hahn, H.2
Hosticka, B.J.3
Schmidt, G.4
-
15
-
-
0026169125
-
Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing
-
June
-
de Lange A. A. J., Deprettere E. F., Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing Proceedings of the 10th IEEE Symposium on Computer Arithmetic June 1991 272 281
-
(1991)
Proceedings of the 10th IEEE Symposium on Computer Arithmetic
, pp. 272-281
-
-
De Lange, A.A.J.1
Deprettere, E.F.2
-
16
-
-
0016115184
-
Fourier transform computers using CORDIC iterations
-
Despain A. M., Fourier transform computers using CORDIC iterations IEEE Transactions on Computers 1974 23 10 993 1001
-
(1974)
IEEE Transactions on Computers
, vol.23
, Issue.10
, pp. 993-1001
-
-
Despain, A.M.1
-
17
-
-
0019928904
-
Highly concurrent computing structures for matrix arithmetic and signal processing
-
Ahmed H. M., Delosme J.-M., Morf M., Highly concurrent computing structures for matrix arithmetic and signal processing Computer 1982 15 1 65 82
-
(1982)
Computer
, vol.15
, Issue.1
, pp. 65-82
-
-
Ahmed, H.M.1
Delosme, J.-M.2
Morf, M.3
-
18
-
-
0025386450
-
A novel implementation of a chirp Z-transform using a CORDIC processor
-
Hu Y. H., Naganathan S., A novel implementation of a chirp Z-transform using a CORDIC processor IEEE Transactions on Acoustics, Speech, and Signal Processing 1990 38 2 352 354
-
(1990)
IEEE Transactions on Acoustics, Speech, and Signal Processing
, vol.38
, Issue.2
, pp. 352-354
-
-
Hu, Y.H.1
Naganathan, S.2
-
19
-
-
0026222189
-
An array architecture for fast computation of discrete Hartley transform
-
DOI 10.1109/31.83883
-
Dhar A. S., Banerjee S., An array architecture for fast computation of discrete Hartley transform IEEE transactions on circuits and systems 1991 38 9 1095 1098 (Pubitemid 21689663)
-
(1991)
IEEE transactions on circuits and systems
, vol.38
, Issue.9
, pp. 1095-1098
-
-
Dhar Anindya, S.1
Banerjee Swapna2
-
20
-
-
0035452239
-
A VLSI array architecture for realization of DFT, DHT, DCT and DST
-
Maharatna K., Dhar A. S., Banerjee S., A VLSI array architecture for realization of DFT, DHT, DCT and DST Signal Processing 2001 81 9 1813 1822
-
(2001)
Signal Processing
, vol.81
, Issue.9
, pp. 1813-1822
-
-
Maharatna, K.1
Dhar, A.S.2
Banerjee, S.3
-
21
-
-
33751078027
-
CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis
-
Ray K. C., Dhar A. S., CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis IEE Proceedings: Circuits, Devices and Systems 2006 153 6 539 544
-
(2006)
IEE Proceedings: Circuits, Devices and Systems
, vol.153
, Issue.6
, pp. 539-544
-
-
Ray, K.C.1
Dhar, A.S.2
-
23
-
-
0022091228
-
A unified approach to orthogonal digital filters and wave digital filters based on LBR two pair extraction
-
Vaidyanathan P. P., A unified approach to orthogonal digital filters and wave digital filters based on LBR two pair extraction IEEE transactions on circuits and systems 1985 32 7 673 686
-
(1985)
IEEE Transactions on Circuits and Systems
, vol.32
, Issue.7
, pp. 673-686
-
-
Vaidyanathan, P.P.1
-
27
-
-
0343289376
-
FPGA realization of a CORDIC based FFT processor for biomedical signal processing
-
Banerjee A., Dhar A. S., Banerjee S., FPGA realization of a CORDIC based FFT processor for biomedical signal processing Microprocessors and Microsystems 2001 25 3 131 142
-
(2001)
Microprocessors and Microsystems
, vol.25
, Issue.3
, pp. 131-142
-
-
Banerjee, A.1
Dhar, A.S.2
Banerjee, S.3
-
28
-
-
0346895417
-
A parallel CORDIC architecture dedicated to compute the Gaussian potential function in neural networks
-
Meyer-Bse A., Watzel R., Meyer-Bse U., Foo S., A parallel CORDIC architecture dedicated to compute the Gaussian potential function in neural networks Engineering Applications of Artificial Intelligence 2003 16 7-8 595 605
-
(2003)
Engineering Applications of Artificial Intelligence
, vol.16
, Issue.78
, pp. 595-605
-
-
Meyer-Bse, A.1
Watzel, R.2
Meyer-Bse, U.3
Foo, S.4
-
29
-
-
33646536034
-
Digit-pipelined direct digital frequency synthesis based on differential CORDIC
-
Kang C. Y., Swartzlander E. E. Jr., Digit-pipelined direct digital frequency synthesis based on differential CORDIC IEEE Transactions on Circuits and Systems I 2006 53 5 1035 1044
-
(2006)
IEEE Transactions on Circuits and Systems i
, vol.53
, Issue.5
, pp. 1035-1044
-
-
Kang, C.Y.1
Swartzlander Jr., E.E.2
-
30
-
-
33749664926
-
Reconfigurable architecture for MIMO systems based on CORDIC operators
-
Wang H., Leray P., Palicot J., Reconfigurable architecture for MIMO systems based on CORDIC operators Comptes Rendus Physique 2006 7 7 735 750
-
(2006)
Comptes Rendus Physique
, vol.7
, Issue.7
, pp. 735-750
-
-
Wang, H.1
Leray, P.2
Palicot, J.3
-
34
-
-
84937078021
-
Signed-digit number representation for fast parallel arithmetic
-
Avizienis A., Signed-digit number representation for fast parallel arithmetic IRE Transactions on Electronic Computers 1961 10 389 400
-
(1961)
IRE Transactions on Electronic Computers
, vol.10
, pp. 389-400
-
-
Avizienis, A.1
-
35
-
-
0002795190
-
Introduction to the role of redundancy in computer arithmetic
-
Atkins D. E., Introduction to the role of redundancy in computer arithmetic IEEE Computer Magazine 1975 8 6 74 77
-
(1975)
IEEE Computer Magazine
, vol.8
, Issue.6
, pp. 74-77
-
-
Atkins, D.E.1
-
36
-
-
0024106266
-
Carry-free addition of recorded binary signed-digit numbers
-
Parhami B., Carry-free addition of recorded binary signed-digit numbers IEEE Transactions on Computers 1988 37 11 1470 1476
-
(1988)
IEEE Transactions on Computers
, vol.37
, Issue.11
, pp. 1470-1476
-
-
Parhami, B.1
-
37
-
-
0025210204
-
Generalized signed-digit number systems: A unifying framework for redundant number representations
-
Parhami B., Generalized signed-digit number systems: a unifying framework for redundant number representations IEEE Transactions on Computers 1990 39 1 89 98
-
(1990)
IEEE Transactions on Computers
, vol.39
, Issue.1
, pp. 89-98
-
-
Parhami, B.1
-
40
-
-
0017023279
-
Suggestion for a fast binary sine/cosine generator
-
Baker P. W., Suggestion for a fast binary sine/cosine generator IEEE Transactions on Computers 1976 25 11 1134 1136
-
(1976)
IEEE Transactions on Computers
, vol.25
, Issue.11
, pp. 1134-1136
-
-
Baker, P.W.1
-
43
-
-
0031347031
-
High performance rotation architectures based on the Radix-4 CORDIC algorithm
-
Antelo E., Villalba J., Bruguera J. D., Zapata E. L., High performance rotation architectures based on the Radix-4 CORDIC algorithm IEEE Transactions on Computers 1997 46 8 855 870
-
(1997)
IEEE Transactions on Computers
, vol.46
, Issue.8
, pp. 855-870
-
-
Antelo, E.1
Villalba, J.2
Bruguera, J.D.3
Zapata, E.L.4
-
44
-
-
0026124152
-
A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms
-
Timmermann D., Hahn H., Hosticka B. J., Rix B., A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms The VLSI Journal on Integration 1991 11 1 85 100
-
(1991)
The VLSI Journal on Integration
, vol.11
, Issue.1
, pp. 85-100
-
-
Timmermann, D.1
Hahn, H.2
Hosticka, B.J.3
Rix, B.4
-
45
-
-
0029237140
-
CORDIC architectures with parallel compensation of the scale factor
-
July Strasbourg, France
-
Villalba J., Hidalgo J. A., Zapata E. L., Antelo E., Bruguera J. D., CORDIC architectures with parallel compensation of the scale factor Proceedings of the International Conference on Application Specific Array Processors July 1995 Strasbourg, France 258 269
-
(1995)
Proceedings of the International Conference on Application Specific Array Processors
, pp. 258-269
-
-
Villalba, J.1
Hidalgo, J.A.2
Zapata, E.L.3
Antelo, E.4
Bruguera, J.D.5
-
46
-
-
0025888014
-
Expanding the range of convergence of the CORDIC algorithm
-
Hu X., Harber R. G., Bass S. C., Expanding the range of convergence of the CORDIC algorithm IEEE Transactions on Computers 1991 40 1 13 21
-
(1991)
IEEE Transactions on Computers
, vol.40
, Issue.1
, pp. 13-21
-
-
Hu, X.1
Harber, R.G.2
Bass, S.C.3
-
47
-
-
0026841735
-
The quantization effects of the CORDIC algorithm
-
Hu Y. H., The quantization effects of the CORDIC algorithm IEEE Transactions on Signal Processing 1992 40 4 834 844
-
(1992)
IEEE Transactions on Signal Processing
, vol.40
, Issue.4
, pp. 834-844
-
-
Hu, Y.H.1
-
51
-
-
84941863581
-
Redundant CORDIC methods with a constant scale factor for sine and cosine computation
-
Takagi N., Asada T., Yajima S., Redundant CORDIC methods with a constant scale factor for sine and cosine computation IEEE Transactions on Computers 1991 40 9 989 995
-
(1991)
IEEE Transactions on Computers
, vol.40
, Issue.9
, pp. 989-995
-
-
Takagi, N.1
Asada, T.2
Yajima, S.3
-
52
-
-
0027539948
-
The CORDIC algorithm: New results for fast VLSI implementation
-
Duprat J., Muller J.-M., The CORDIC algorithm: new results for fast VLSI implementation IEEE Transactions on Computers 1993 42 2 168 178
-
(1993)
IEEE Transactions on Computers
, vol.42
, Issue.2
, pp. 168-178
-
-
Duprat, J.1
Muller, J.-M.2
-
53
-
-
0000830875
-
Double step branching CORDIC: A new algorithm for fast sine and cosine generation
-
Phatak D. S., Double step branching CORDIC: a new algorithm for fast sine and cosine generation IEEE Transactions on Computers 1998 47 5 587 602
-
(1998)
IEEE Transactions on Computers
, vol.47
, Issue.5
, pp. 587-602
-
-
Phatak, D.S.1
-
54
-
-
0026908898
-
Constant-factor redundant CORDIC for angle calculation and rotation
-
Lee J. A., Lang T., Constant-factor redundant CORDIC for angle calculation and rotation IEEE Transactions on Computers 1992 41 8 1016 1025
-
(1992)
IEEE Transactions on Computers
, vol.41
, Issue.8
, pp. 1016-1025
-
-
Lee, J.A.1
Lang, T.2
-
56
-
-
0001003575
-
The differential CORDIC algorithm: Constant scale factor redundant implementation without correcting iterations
-
Dawid H., Meyr H., The differential CORDIC algorithm: constant scale factor redundant implementation without correcting iterations IEEE Transactions on Computers 1996 45 3 307 318
-
(1996)
IEEE Transactions on Computers
, vol.45
, Issue.3
, pp. 307-318
-
-
Dawid, H.1
Meyr, H.2
-
63
-
-
0037005849
-
Pipelining flat CORDIC based trigonometric function generators
-
Gisuthan B., Srikanthan T., Pipelining flat CORDIC based trigonometric function generators Microelectronics Journal 2002 33 1-2 77 89
-
(2002)
Microelectronics Journal
, vol.33
, Issue.12
, pp. 77-89
-
-
Gisuthan, B.1
Srikanthan, T.2
-
65
-
-
28644435159
-
A new semi-flat architecture for high speed and reduced area CORDIC chip
-
Kebbati H. S., Blonde J. Ph., Braun F., A new semi-flat architecture for high speed and reduced area CORDIC chip Microelectronics Journal 2006 37 2 181 187
-
(2006)
Microelectronics Journal
, vol.37
, Issue.2
, pp. 181-187
-
-
Kebbati, H.S.1
Blonde, J.Ph.2
Braun, F.3
-
66
-
-
0037053911
-
A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators
-
Srikanthan T., Gisuthan B., A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators Microprocessors and Microsystems 2002 26 5 243 252
-
(2002)
Microprocessors and Microsystems
, vol.26
, Issue.5
, pp. 243-252
-
-
Srikanthan, T.1
Gisuthan, B.2
|