Optimising memory bandwidth use for matrix-vector multiplication in iterative methods

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5992 LNCS, Issue , 2010, Pages 169-181

  Boland, David ^a   Constantinides, George A ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BANDED MATRICES; FUNDAMENTAL PROBLEM; GENERAL-PURPOSE PROCESSORS; HARDWARE DESIGN; MATRIX VECTOR MULTIPLICATION; MEMORY BANDWIDTHS; ON CHIP MEMORY; PARALLELISATION; PERFORMANCE GAIN; PERFORMANCE IMPROVEMENTS; SCIENTIFIC COMPUTING; SYSTEM OF LINEAR EQUATIONS;

CAVITY RESONATORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); ITERATIVE METHODS;

MATRIX ALGEBRA;

EID: 77951276230     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-12133-3_17     Document Type: Conference Paper

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