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Volumn , Issue , 2002, Pages 464-469

Hierarchical current density verification for electromigration analysis in arbitrarily shaped metallization patterns of analog circuits

Author keywords

[No Author keywords available]

Indexed keywords

COMMERCIAL DESIGN; DESIGN RULE CHECKS; ELECTROMIGRATION ANALYSIS; ELECTRONIC DEVICE; HIERARCHICAL VERIFICATION; HIGH CURRENT DENSITIES; TEMPERATURE DEPENDENCIES; THERMAL SIMULATIONS;

EID: 77951153495     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998314     Document Type: Conference Paper
Times cited : (5)

References (19)
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    • Hunter, W.1
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    • Hunter, P.1
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.