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Volumn , Issue , 2009, Pages 1183-1186

Robust and high performance subthreshold standard cell design

Author keywords

Minimum energy point; Standard cell library; Subthreshold; Transistor utility factor

Indexed keywords

CELL LIBRARY; DELAY VARIATION; ENERGY DELAY PRODUCT; HIGH-PERFORMANCE CELL; LOW POWER; MINIMUM ENERGY POINT; OPTIMAL DESIGN; PERFORMANCE IMPROVEMENTS; PROCESS VARIATION; STANDARD CELL; STANDARD CELL DESIGN; SUBTHRESHOLD; SUBTHRESHOLD CIRCUITS; SUBTHRESHOLD TRANSISTORS; WORST CASE;

EID: 77950678316     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2009.5235946     Document Type: Conference Paper
Times cited : (6)

References (6)
  • 3
    • 25144514874 scopus 로고    scopus 로고
    • Modeling and sizing for minimum energy operation in subthreshold circuits
    • DOI 10.1109/JSSC.2005.852162
    • Benton H. Calhoun, Alice Wang and Anantha Chandrakasan, "Modeling and Sizing for Minimum Energy Operation in sub-threshold Circuits," IEEE Journal of Solid-State Circuits, vol. 40, No.9, Sept. 2005. (Pubitemid 41352154)
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.9 , pp. 1778-1785
    • Calhoun, B.H.1    Wang, A.2    Chandrakasan, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.