Systematic design centering of continuous time oversampling converters

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 57, Issue 3, 2010, Pages 158-162

  Pavan, Shanthi ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY MADRAS   (India)

Author keywords

A D; Analog to digital; Compensation; Continuous time; Conversion; Gain bandwidth; Sigma delta

Indexed keywords

ANALOG TO DIGITAL CONVERSION; COMPENSATION (PERSONNEL); DESIGN; DIGITAL TO ANALOG CONVERSION; MODULATORS; OPERATIONAL AMPLIFIERS; SHIP CONVERSION;

ANALOG-TO-DIGITAL; CONTINUOUS-TIME; CONVENTIONAL TECHNIQUES; DELTA SIGMA MODULATOR; GAIN BANDWIDTH; NOISE TRANSFER FUNCTION; SIGMA DELTA; SYSTEMATIC DESIGNS;

CONTINUOUS TIME SYSTEMS;

EID: 77950231797     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2010.2041814     Document Type: Article

References (5)

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4. J. Cherry and W. Snelgrove, "Excess loop delay in continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol.46, no.4, pp. 376-389, Apr. 1999.
5. M. Ortmanns, F. Gerfers, and Y. Manoli, "Compensation of finite gainbandwidth induced errors in continuous-time sigma-delta modulators," IEEE Trans. Circuits Syst. I, Reg. Papers, vol.51, no.6, pp. 1088-1099, Jun. 2004.