Fermi level depinning for the design of III-V fet source/drain contacts

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 2009, Pages 123-124

  Hu, Jenny ^a   Guan, Ximeng ^a   Choi, Donghun ^a   Harris, James S ^a   Saraswat, Krishna ^a   Wong, H S Philip ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 77950169942     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2009.5159321     Document Type: Conference Paper

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