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Volumn , Issue , 2009, Pages 104-111
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Memory-efficient pipelined architecture for large-scale string matching
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Author keywords
[No Author keywords available]
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Indexed keywords
BIT-WIDTH;
CLOCK FREQUENCY;
FIELD PATTERNS;
HIGH-THROUGHPUT;
NOVEL ARCHITECTURE;
ON CHIP MEMORY;
PARTIAL STATE;
PIPELINED ARCHITECTURE;
PROPOSED ARCHITECTURES;
STRING MATCHING;
SUB-PROBLEMS;
COMPUTERS;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
MERGERS AND ACQUISITIONS;
TABLE LOOKUP;
PIPELINES;
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EID: 74349108825
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/FCCM.2009.17 Document Type: Conference Paper |
Times cited : (14)
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References (14)
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