A low voltage steep turn-off tunnel transistor design

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn , Issue , 2009, Pages

  Patel, Pratik ^a   Jeon, Kanghoon ^a   Bowonder, Anupama ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL DESIGN; DOPING PROFILES; EFFECTIVE BAND GAP; HIGH ELECTRIC FIELDS; LOW VOLTAGE OPERATION; LOW VOLTAGES; TCAD SIMULATION; TRANSISTOR STRUCTURE; TUNNEL TRANSISTORS;

DESIGN; ELECTRIC FIELDS; HETEROJUNCTIONS; TRANSISTORS; TUNNELING (EXCAVATION);

WIND TUNNELS;

EID: 74349100268     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SISPAD.2009.5290257     Document Type: Conference Paper

References (9)

1. W. M. Reddick et al., Applied Physics. Letters, vol. 67(4), pp. 494-497, 1995.
2. C. Aydin et al., Applied Physics. Letters, vol. 84(10), pp. 1780-82, 2004.
3. C. Hu et al., Invited VLSI-TSA, Taipei, Taiwan, April, 2008.
4. A. Bowonder et al., International Workshop on Junction Technology, pp. 93-96, 2008.
5. W. Franz, Handuch der Physik, Springer-Verlag, Berlin, 1956.
6. C. G. Van der Walle et al, Physics Review B, vol. 38(8), pp.5621-5634, 1986.
7. M. M. Rieger et al., Phyics. Review B, vol. 48(19), pp.14276-14287, 1993.
8. L. Yang et al., Semiconductor Science Technology. vol. 19(10), pp.1174-1182, 2004.
9. Band Structure Lab, available at www.nanohub.org