System power distribution network theory and performance with various noise current stimuli including impacts on chip level timing

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2009, Pages 621-628

  Smith, Larry ^a   Sun, Shishuang ^a   Boyle, Peter ^a   Krsnik, Bozidar ^a  

^a ALTERA CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE NETWORK; CHARACTERIZATION TECHNIQUES; CIRCUIT PARAMETER; FREQUENCY DOMAINS; IR DROP; MEASURED RESULTS; NOISE CURRENT; ON CHIPS; POWER DISTRIBUTION NETWORK; PRBS PATTERN; PRODUCT PERFORMANCE; SWITCHING CURRENTS; TEST VEHICLE; TIME DOMAIN; VOLTAGE NOISE; VOLTAGE WAVEFORMS; WORST CASE;

DISTRIBUTED PARAMETER NETWORKS; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUITS; JITTER; LOGIC CIRCUITS; RESONANCE; SWITCHING CIRCUITS; TIME MEASUREMENT;

TIMING CIRCUITS;

EID: 74049094409     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2009.5280742     Document Type: Conference Paper

References (7)

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3. B.Garben, M.McAllister, W.Becker, R.French, "Mid-Frequency Delta-I Noise Analysis of Complex Computer System Boards with Multiprocessor Modules and Verification by Measurements," IEEE Transactions on Advance Packaging, Vol. 24, No.3, P294, August 2001.
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6. L.D.Smith, R.E.Anderson, D.W.Forehand, T.J.Pelc, T.Roy, "Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology," IEEE Transactions on Advanced Packaging, Vol.22, No.3, P284, August 1999.
7. I.Novak, Measuring Milliohms and PicoHenrys in Power Distribution Networks," Design Con 2000.