Compact multi-dimensional kernel extraction for register tiling

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, SC '09

Volumn , Issue , 2009, Pages

  Renganarayana, Lakshminarayanan ^a   Bondhugula, Uday ^a   Derisavi, Salem ^b   Eichenberger, Alexandre E ^a   O'Brien, Kevin ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM TORONTO LAB   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

LOOP STRUCTURE; OPTIMIZERS; PERFORMANCE BENEFITS; PERFORMANCE IMPROVEMENTS; PRE-PROCESSING; SIMPLE LOOP;

STRUCTURAL OPTIMIZATION;

EID: 74049094404     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1654059.1654105     Document Type: Conference Paper

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