Register tiling in nonrectangular iteration spaces

ACM Transactions on Programming Languages and Systems

Volumn 24, Issue 4, 2002, Pages 409-453

  Jiménez, Marta ^a   Llabería, José M ^a   Fernández, Agustín ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

D.3.4 Programming Languages Processors; Data reuse; Locality; Loop optimization; Loop tiling; Measurement; Performance; Register level

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); COMPUTER PROGRAMMING LANGUAGES; COMPUTER SOFTWARE REUSABILITY; DATA PROCESSING; HEURISTIC METHODS; ITERATIVE METHODS; LINEAR ALGEBRA; MICROPROCESSOR CHIPS; PROGRAM COMPILERS;

DATA REUSE; REGISTER TILING;

SHIFT REGISTERS;

EID: 0038895757     PISSN: 01640925     EISSN: None     Source Type: Journal    
DOI: 10.1145/567097.567101     Document Type: Article

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