A zero VTH memory cell ferroelectric-NAND flash memory with 32% read disturb, 24% program disturb, 10% data retention improvement for enterprise SSD

ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference

Volumn , Issue , 2009, Pages 225-228

  Hatanaka, Teruyoshi ^a   Takahashi, Mitsue ^b   Sakai, Shigeki ^b   Takeuchi, Ken ^a  

^a UNIVERSITY OF TOKYO   (Japan)

^b NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA RETENTION; FLOATING-GATES; MEASURED RESULTS; MEMORY CELL; NAND FLASH MEMORY; NEGATIVE V; READ DISTURB;

CELLS; CYTOLOGY; FERROELECTRICITY; NAND CIRCUITS; SEMICONDUCTOR STORAGE;

FLASH MEMORY;

EID: 72849123489     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2009.5331440     Document Type: Conference Paper

References (6)

1. K.Takeuchi, "NAND successful as a media for SSD," IEEE ISSCC, Tutorial T7, 2008.
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3. S. Sakai, M. Takahashi, K. Takeuchi, Q.-H. Li, T. Horiuchi, S. Wang, K.-Y. Yun, M. Takamiya and T. Sakurai, "Highly Scalable Fe(Ferrolectric)-NAND Cell with MFIS(Metal-Ferroelectric-lnsulator- Semiconductor) Structure for Sub-10 nm Tera-Bit Capacity NAND Flash Memories," IEEE Nonvolatile Semiconductor Memory Workshop, pp.103-104, 2008.
4. T. Hatanaka, R. Yajima, T. Horiuchi, S. Wang, X. Zhange, M. Takahashi, S. Sakai and K. Takeuchi, "Ferroelectric(Fe)-NAND Flash Memory with Non-volatile Page Buffer for Data Center Application Enterprise Solid-State Drives(SSD)," IEEE Symposium on VLSI Circuits, 2009.
5. TH Cell Architecture for Highly Scalable, Exellently Noise-Immune, and Highly Reliable NAND Flash Memories," IEEE JOURNAL OF SOLID-STATE CIRCUITS, 34, 5, pp.675-684, 1999.
6. T. P. Ma and J.-P. Han, "Why is Nonvolatile Ferroelectric Memory Field-Effect Transistor Still Elusive?," IEEE ELECTRON DEVICE LETTERS, 23, 7, pp.386-388, 2002.