Design and characterization of a multi-rc-triggered MOSFET-based power clamp for on-chip ESD protection

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 2006, Pages 179-185

  Li, Junjun ^a   Gauthier, Robert ^a   Mitra, Souvick ^a   Putnam, Christopher ^a   Chatty, Kiran ^a   Halbach, Ralph ^a   Seguin, Christopher ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; AREA REDUCTION; FAILURE CURRENTS; HARDWARE CHARACTERIZATION; MOS-FET; ON-CHIP ESD PROTECTION; POWER CLAMPS; RISETIMES;

CLAMPING DEVICES; CMOS INTEGRATED CIRCUITS; ELECTROSTATIC DEVICES; ELECTROSTATIC DISCHARGE; INTEGRATED CIRCUIT MANUFACTURE; PUMPS; TRIGGER CIRCUITS;

MOSFET DEVICES;

EID: 70450211394     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EOSESD.2006.5256781     Document Type: Conference Paper

References (10)

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8. IBM, U.S. patent filed.
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