Advanced chip to wafer bonding: A flip chip to wafer bonding technology for high volume 3DIC production providing lowest cost of ownership

2009 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2009

Volumn , Issue , 2009, Pages 932-936

  Sigl, A ^a   Pargfrieder, S ^a   Pichler, C ^b   Scheiring, C ^b   Kettner, P ^a  

^a EV GROUP   (Austria)

^b Datacon Technology GmbH   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY YIELDS; BONDING PROCESS; COST OF OWNERSHIP; DIE STACK; ELECTRICAL DEVICES; FLIP CHIP; HIGH-VOLUME PRODUCTION; HIGHLY INTEGRATED; LOW COSTS; ON-WAFER; ORDER OF MAGNITUDE; PROCESS FLOWS; SEMICONDUCTOR CHIPS; SOLDER BUMPING; SOLDER VOLUME; SYSTEM IN PACKAGE; TRANSISTOR SIZE; TWO-STEP PROCESS; WAFER BONDING PROCESS; WAFER LEVEL; WAFERBONDING TECHNOLOGY;

CHIP SCALE PACKAGES; COBALT COMPOUNDS; DIES; ELECTRONIC EQUIPMENT MANUFACTURE; INTERNET PROTOCOLS; PACKAGING; SEMICONDUCTOR DEVICES; SHRINKAGE; SILICON WAFERS; TECHNOLOGY; TELECOMMUNICATION EQUIPMENT; THROUGHPUT;

WAFER BONDING;

EID: 70449813272     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICEPT.2009.5270559     Document Type: Conference Paper

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