Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90nm CMOS ASICs

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 2005, Pages

  Brennan, Ciaran J ^a   Chang, Shunhua ^a   Woo, Min ^a   Chatty, Kiran ^a   Gauthier, Robert ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; DARLINGTON; ESD PROTECTION; TRIPLE WELL; TURN-ON TIME;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CONTINUUM DAMAGE MECHANICS; ELECTROSTATIC DEVICES; ELECTROSTATIC DISCHARGE;

DIODES;

EID: 70449707416     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. th EOS/ESD Symp., 2004
2. M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, C. Trinh, "Diode-Triggered SCR (DTSCR) for RF-ESD Protection of BiCMOS SiGe HBTs and CMOS Ultra-Thin Gate Oxides", IEDM, 2003, pp.21.3.1-21.3.4
3. P.A. Juliano, E. Rosenbaum, "A novel SCR macromodel for ESD circuit simulation", IEDM Technical Digest, 2001 pp. 14.3.1 - 14.3.4
4. Ming-Dou Ker; Kuo-Chun Hsu, "Native-NMOS-triggered SCR (NANSCR) for ESD protection in .13um CMOS integrated circuits", IRPS, 2004. pp. 381-386
5. th EOS/ESD Symp., 2003, pp. 233-241.
6. M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, C. Trinh, "Speed Optimized Diode-Triggered SCR (DTSCR) for RF-ESD Protection of Ultra-Sensitive IC Nodes in Advanced Technologies", IEEE TDMR, In Print
7. Ming-Dou Ker; Kuo-Chun Hsu, "SCR Device With Double-Triggered for On-Chip ESD Protection in Sub-Quarter-Micron Silicided CMOS Processes" IEEE TDMR, September 2003, pp. 58.