Using randomized caches in probabilistic real-time systems

Proceedings - Euromicro Conference on Real-Time Systems

Volumn , Issue , 2009, Pages 129-138

  Quiñones, Eduardo ^a   Berger, Emery D ^b   Bernat, Guillem ^c   Cazorla, Francisco J ^a  

^a BARCELONA SUPERCOMPUTING CENTER   (Spain)

^b University of Massachusetts Amherst   (United States)

^c RAPITA SYSTEMS LTD   (United Kingdom)

Author keywords

Cache replacement policies; Hard real time systems; Randomized hardware; Timing analysis

Indexed keywords

ACCESS HISTORY; APPLICATION PERFORMANCE; CACHE MISS; CACHE REPLACEMENT POLICIES; CACHE REPLACEMENT POLICY; DATA ACCESS PATTERNS; HARD REAL-TIME; HARD REAL-TIME SYSTEMS; MEMORY LAYOUT; PATHOLOGICAL CASE; PERFORMANCE ANOMALY; PERFORMANCE PREDICTION; RANDOMIZED HARDWARE; SAFETY-CRITICAL; SIMULATION-BASED; TIMING ANALYSIS; WORST CASE; WORST-CASE EXECUTION TIME ANALYSIS;

CACHE MEMORY; RISK ANALYSIS; TIME MEASUREMENT;

REAL TIME SYSTEMS;

EID: 70449579129     PISSN: 10683070     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECRTS.2009.30     Document Type: Conference Paper

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