Fundamental performance differences between CMOS and CCD imagers: Part III

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7439, Issue , 2009, Pages

  Janesick, James ^a   Pinter, Jeff ^a   Potter, Robert ^a   Elliott, Tom ^b   Andrews, James ^c   Tower, John ^c   Cheng, John ^d   Bishop, Jeanne ^d  

^a SARNOFF CORPORATION   (United States)

^b CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

^c SARNOFF CORPORATION   (United States)

^d Chronicle Technology   (United States)

Author keywords

CMOS and CCD scientific imagers

Indexed keywords

BACKSIDE-ILLUMINATED; BURIED CHANNELS; CCD IMAGERS; CMOS AND CCD SCIENTIFIC IMAGERS; CMOS DESIGN; CMOS FABRICATION; CMOS IMAGERS; DEEP DEPLETION; FLICKER NOISE; FUNDAMENTAL PROBLEM; IMAGERS; LOW COSTS; MOS-FET; MOSFETS; NEAR-IR; NON-UNIFORMITIES; PROCESS OPTIMIZATION; RESISITIVITY; SIGNAL PROCESSOR; SUBSTRATE BIAS; ULTRA LOW NOISE;

ASTROPHYSICS; CHARGE TRANSFER; DIGITAL CAMERAS; FABRICATION; ION EXCHANGE; MOSFET DEVICES; OPTIMIZATION; PIXELS; RADIATION DAMAGE; SEMICONDUCTING SILICON COMPOUNDS; SIGNAL PROCESSING; SILICON WAFERS;

IMAGE SENSORS;

EID: 70449566996     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.831203     Document Type: Conference Paper

References (11)

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