Performance and power consumption trade-offs for a VLIW DSP

2009 International Symposium on Signals, Circuits and Systems, ISSCS 2009

Volumn , Issue , 2009, Pages

  Ibrahim, Mostafa E A ^a,b   Rupp, Markus ^a   Habib, S E D ^b  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b CAIRO UNIVERSITY   (Egypt)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNALS; GLOBAL PERFORMANCE; POWER CONSUMPTION; TEXAS INSTRUMENTS; VLIW PROCESSOR;

COMMERCE; DIGITAL SIGNAL PROCESSORS; EMBEDDED SYSTEMS; IMAGE PROCESSING; PROGRAM COMPILERS; SOFTWARE ARCHITECTURE; VERY LONG INSTRUCTION WORD ARCHITECTURE;

ELECTRIC POWER UTILIZATION;

EID: 70449479334     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCS.2009.5206135     Document Type: Conference Paper

References (9)

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8. M. E. A. Ibrahim, M. Rupp, and H. A. H. Fahmy, "Power Estimation Methodology for VLIW Digital Signal Processor," in Proceedings of the Conference on signals, systems and computers (SSC'08), Asilomar, CA, US, October 2008.
9. Texas Instruments, TMS320C64x/C64x+, DSP CPU and Instruction Set Reference Guide, July 2007, sPRU732D. [Online]. Available: www.ti.com