CMOS device design-in reliability approach in advanced nodes

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2009, Pages 624-633

  Huard, Vincent ^a   Parthasarathy, C R ^a   Bravaix, Alain ^b   Guerin, Chloe ^a,b   Pion, Emmanuel ^a  

^a STMICROELECTRONICS   (France)

^b AIX MARSEILLE UNIVERSITÉ   (France)

Author keywords

AGE function; Design; HCI; ISCAS; NBTI; Reliability

Indexed keywords

AGE FUNCTION; AGEING EFFECTS; CMOS DEVICES; DIGITAL PRODUCTS; HCI; ISCAS; NBTI; PARAMETERS EXTRACTION; RELIABILITY APPROACH; RELIABILITY SIMULATION;

DESIGN; DIGITAL LIBRARIES; ELECTRIC CURRENTS; FLOW SIMULATION; INTEGRATED CIRCUIT LAYOUT; NEGATIVE TEMPERATURE COEFFICIENT; SIMULATORS; THERMODYNAMIC STABILITY;

RELIABILITY;

EID: 70449095828     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2009.5173321     Document Type: Conference Paper

References (24)

1. Leblebici, Y., Kang, S. M. "Hot-carrier reliability of MOS VLSI circuits", Kluwer Academic Publishers (1993)
2. Thewes, R. et al., Microelectronics Reliability 40 (2000) 1545-1554
3. Reddy, V. et al. IEEE IRPS Proc. (2002) 248-254
4. Parthasarathy, C.R. et al. Microelectronics Reliability, 46 (2006) 1464-1471
5. Chakravarthy, S. et al. IEEE IRPS Proc. (2004) 273-282
6. Denais, M. et al., IEEE IEDM Proc. (2004) 109-112
7. Huard, V. et al., Microelectronics Reliability 46 (2006) 1-23
8. Rangan, S. et al., IEEEE IEDM Proc. (2003) 41
9. Huard, V. et al., IEEE IEDM Proc. (2007)
10. Reisinger, H. et al., IEEE IRPS Proc. (2006) 448-453
11. Schroder, D. et al., J. Appl. Phys. 94 (2003)
12. Huard, V. et al., IEEE IRPS Proc. (2006) 733-734
13. Huard, V. et al., IEEE IRPS Proc. (2004) 40-45
14. Grasser, T. et al., IEEE IRPS Proc. (2007) 268-280
15. Tewksbury, T., MIT PhD (1992).
16. Grasser, T. et al., IEEE IRPS Proc. (2009)
17. Rauch, S.E. TDMR, vol. 1, (2001)
18. Guerin, C. et al., IEEE IRPS Proc. (2008)
19. Bravaix, A. et al., IEEE IRPS Proc. (2009)
20. Huard V. et al., IEEE TDMR vol. 7, (2007)
21. Takayanagi, T., IEEE SSC 40 (2005) 7
22. M. A. Alam, et al. Microelectronics Reliability, 45 (2005)
23. Huard, V., "Design-in Reliability tutorial", IEEE IRPS Proc. (2009)
24. K. N. Quader, E.R. Minami, W.-J. Huang, P. K. Ko and C. Hu, "Hot-carrier reliability design guidelines for CMOS logic circuits", Sol. Stat. Cir. 29 (1994) 253