MPTLsim: A simulator for X86 multicore processors

Proceedings - Design Automation Conference

Volumn , Issue , 2009, Pages 226-231

  Hui, Zeng ^a   Yourst, Matt ^a   Ghose, Kanad ^a   Ponomarev, Dmitry ^a  

^a State University of New York   (United States)

Author keywords

Coherent cache; Microprocessor; Simulator

Indexed keywords

COHERENT CACHE; DRAM MEMORIES; FAST AND ACCURATE SIMULATIONS; INSTRUCTION SET; MEMORY BUS; MICROPROCESSOR; MULTI-CORE PROCESSOR; ON-CHIP INTERCONNECTION; PROCESSING CORE; SYSTEM LEVELS; SYSTEM-ON-A-CHIP; TECHNIQUES USED;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; DYNAMIC RANDOM ACCESS STORAGE; SIMULATORS;

MICROPROCESSOR CHIPS;

EID: 70350743261     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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