Exploiting the cell/BE architecture with the starPU unified runtime system

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5657 LNCS, Issue , 2009, Pages 329-339

  Augonnet, Cédric ^a   Thibault, Samuel ^a   Namyst, Raymond ^a   Nijhuis, Maik ^b  

^a UNIVERSITÉ DE BORDEAUX   (France)

^b VU UNIVERSITY AMSTERDAM   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CELL PROCESSOR; COMPUTING UNITS; DATA MANAGEMENT; EXECUTION MODEL; GRAPHIC PROCESSORS; HETEROGENEOUS MULTICORE; HETEROGENEOUS RESOURCES; HIGH PERFORMANCE APPLICATIONS; LINEAR ALGEBRA ALGORITHMS; MULTI-CORE PROCESSOR; MULTICORE CHIPS; PEAK PERFORMANCE; PERFORMANCE PORTABILITY; POWER EFFICIENT; PROGRAMMABILITY; RUNTIME SYSTEMS; SCALABLE DESIGN; TIGHTLY-COUPLED;

CELL MEMBRANES; CLOSED LOOP CONTROL SYSTEMS; COMPUTATIONAL EFFICIENCY; EMBEDDED SYSTEMS; LEARNING ALGORITHMS; SIMULATORS; SOFTWARE ARCHITECTURE;

PROGRAM COMPILERS;

EID: 70350416667     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-03138-0_36     Document Type: Conference Paper

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