A switched capacitor implementation of the generalized linear integrate-and-fire neuron

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 2149-2152

  Folowosele, Fopefolu ^a   Harrison, Andre ^a   Cassidy, Andrew ^a   Andreou, Andreas G ^a   Etienne Cummings, Ralph ^a   Mihalas, Stefan ^b   Niebur, Ernst ^b   Hamilton, Tara Julia ^c  

^a Johns Hopkins University   (United States)

^b JOHNS HOPKINS UNIVERSITY   (United States)

^c UNIVERSITY OF QUEENSLAND   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESSS; INTEGRATE-AND-FIRE NEURONS; LOW COMPLEXITY; NEURAL MODELS; NEUROMORPHIC SYSTEMS; SILICON NEURON; SIMULATION RESULT; SWITCHED CAPACITOR;

EID: 70350176823     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5118121     Document Type: Conference Paper

References (13)

1. S. Mihalas and E. Niebur, "A generalized linear integrate-and-fire neural model produces diverse spiking behaviors," Neural Computation, 2008, in Press.
2. S. R. Schultz and M. A. Jabri, "Analogue vlsi 'integrate-and-fire' neuron with frequency adaptation," Electronics Letters, vol. 31, 1995.
3. G. Indiveri, E. Chicca, and R. Douglas, "A low-power adaptive integrate-and-fire neuron circuit," in IEEE ISCAS, vol. 4, 2003, pp. 820-823.
4. B. Linares-Barranco, E. Sanchez-Sinencio, A. Rodriguez-Vazquez, and J. L. Huertas, "A cmos implementation of fitzhugh-nagumo neuron model," Solid-State Circuits, IEEE Journal of, vol. 26, 1991.
5. K. Nakada, T. Asai, and H. Hayashi, "Analog vlsi implementation of resonate-and-fire neuron," International Journal of Neural Systems, vol. 16, pp. 445-456, 2006.
6. L. Y. Jun, L. Jihyun, Y. Kim, J. Ayers, A. Volkovskii, A. Selverston, H. Abarbanel, and M. Rabinovich, "Low power real time electronic neuron vlsi design using subthreshold technique," in IEEE ISCAS, vol. 4, 2004, pp. 744-747.
7. E. Izhikevich, "Simple model of spiking neurons," IEEE Transactions on Neural Networks, vol. 14, pp. 1569-1572, 2003.
8. J. Wijekoon and P. Dudek, "Compact silicon neuron circuit with spiking and bursting behavior," Neural Networks, vol. 21, pp. 524-534, 2008.
9. A. Hill, "Excitation and accommodation in nerve," Proc. Roy. Soc. B, vol. 119, p. 305355, 1936.
10. R. B. Stein, "Some models of neuronal variability," Biophys. J., vol. 7, pp. 37-68, 1967.
11. R. Vogelstein, U. Mallik, J. Vogelstein, and G. Cauwenberghs, "Dynamically reconfigurable silicon array of spiking neurons with conductance-based synapses," IEEE Transactions on Neural Networks, vol. 18, pp. 253-265, 2007.
12. E. Izhikevich, "Which model to use for cortical spiking neurons," IEEE Transactions on Neural Networks, vol. 15, no. 5, pp. 1063-1070, 2004.
13. M. Kouh and T. Poggio, "A canonical neural circuit for cortical nonlinear operations," Neural Computation, vol. 20, no. 6, pp. 1427-1451, 2008.