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Volumn 4, Issue , 2003, Pages

A low-power adaptive integrate-and-fire neuron circuit

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; NEURAL NETWORKS; THRESHOLD VOLTAGE; TRANSISTORS; VLSI CIRCUITS;

EID: 0038757574     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (226)

References (15)
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    • Boahen, K.A.1
  • 3
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    • A pulsed communication/computation framework for analog VLSI perceptive systems
    • T. S. Lande, Ed., Kluwer Academic, Norwell, MA
    • A. Mortara, "A pulsed communication/computation framework for analog VLSI perceptive systems," in Neuromorphic Systems Engineering, T. S. Lande, Ed., pp. 217-228. Kluwer Academic, Norwell, MA, 1998.
    • (1998) Neuromorphic Systems Engineering , pp. 217-228
    • Mortara, A.1
  • 4
    • 0003005916 scopus 로고    scopus 로고
    • A pulse-coded communications infrastructure for neuromorphic systems
    • W. Maass and C. M. Bishop, Eds., chapter 6. MIT Press
    • S. R. Deiss, R. J. Douglas, and A. M. Whatley, "A pulse-coded communications infrastructure for neuromorphic systems," in Pulsed Neural Networks, W. Maass and C. M. Bishop, Eds., chapter 6, pp. 157-178. MIT Press, 1998.
    • (1998) Pulsed Neural Networks , pp. 157-178
    • Deiss, S.R.1    Douglas, R.J.2    Whatley, A.M.3
  • 7
    • 0034576069 scopus 로고    scopus 로고
    • Modeling selective attention using a neuromorphic analog VLSI device
    • December
    • G. Indiveri, "Modeling selective attention using a neuromorphic analog VLSI device," Neural Computation, vol. 12, no. 12, pp. 2857-2880, December 2000.
    • (2000) Neural Computation , vol.12 , Issue.12 , pp. 2857-2880
    • Indiveri, G.1
  • 8
    • 0034762808 scopus 로고    scopus 로고
    • Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons
    • Sep
    • D.H. Goldberg, G. Cauwenberghs, and A.G. Andreou, "Probabilistic synaptic weighting in a reconfigurable network of VLSI integrate-and-fire neurons," Neural Networks, vol. 14, no. 6-7, pp. 781-793, Sep 2001.
    • (2001) Neural Networks , vol.14 , Issue.6-7 , pp. 781-793
    • Goldberg, D.H.1    Cauwenberghs, G.2    Andreou, A.G.3
  • 9
    • 0035935797 scopus 로고    scopus 로고
    • Arbitrated address-event representation digital image sensor
    • Nov
    • E. Culurciello, R. Etienne-Cummings, and K. Boahen, "Arbitrated address-event representation digital image sensor," Electronics Letters, vol. 37, no. 24, pp. 1443-1445, Nov 2001.
    • (2001) Electronics Letters , vol.37 , Issue.24 , pp. 1443-1445
    • Culurciello, E.1    Etienne-Cummings, R.2    Boahen, K.3
  • 12
    • 0029634686 scopus 로고
    • Analogue VLSI 'integrate-and-fire' neuron with frequency adaptation
    • Aug
    • S. R. Schultz and M. A. Jabri, "Analogue VLSI 'integrate-and-fire' neuron with frequency adaptation," Electronic Letters, vol. 31, no. 16, pp. 1357-1358, Aug 1995.
    • (1995) Electronic Letters , vol.31 , Issue.16 , pp. 1357-1358
    • Schultz, S.R.1    Jabri, M.A.2
  • 14
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    • Jul-Sep
    • A. van Schaik, "Building blocks for electronic spiking neural networks," Neural Networks, vol. 14, no. 6-7, pp. 617-628, Jul-Sep 2001.
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    • Van Schaik, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.