Resource constrained VLSI architecture for implantable neural data compression systems

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 1481-1484

  Kamboh, Awais M ^a   Oweiss, Karim G ^a   Mason, Andrew J ^a  

^a Michigan State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

4-LEVEL; COMPRESSION SYSTEM; DATA TELEMETRY; DESIGN DECISIONS; ENERGY COMPACTION; HIGH-DENSITY; LOSSLESS COMPRESSION; MICROELECTRODE ARRAY; NEURAL DATA; NEURAL INTERFACES; NEURAL RECORDINGS; NEURAL SIGNALS; PERFORMANCE TRADE-OFF; RESOURCE-CONSTRAINED; RUN-LENGTH ENCODING; TIME FREQUENCY DOMAIN; VLSI ARCHITECTURES;

COMPACTION; DISCRETE WAVELET TRANSFORMS; IMAGE COMPRESSION;

DATA COMPRESSION;

EID: 70350166236     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5118047     Document Type: Conference Paper

References (9)

1. M. Nicolelis, "Actions from thoughts," Nature, vol. 409, pp. 403-407, Jan. 2001.
2. A. M. Sodagar, K. D. Wise, and K. Najafi, "A fully integrated mixed-signal neural processor for implantable multichannel cortical recording," IEEE Trans. on Biomed. Eng., vol. 54, no. 6, pp. 1075-1088, Jun 2007.
3. R. R. Harrison, P. T. Watkins, R. J. Kier, R. O. Lovejoy, D. J. Black, B. Greger, and F. Solzbacher, "A low power integrated circuit for a wireless 100 electrode neural recording system," IEEE Journal of Solid State Circuits, vol. 42, no. 1, pp. 123-133, Jan 2007.
4. J. G. Harris, J. C. Principe, J. C. Sanchez, D. Chen and C. She, "Pulse based signal compression for implanted neural recording systems," IEEE Int. Symp. on Circuits and Systems, pp. 344-347, May 2008.
5. K. Oweiss, "A systems approach for data compression and latency reduction in cortically controlled brain machine interfaces," IEEE Trans. on Biomed. Eng., vol. 53, no. 7, pp. 1364-1377, Jul. 2006.
6. K. Oweiss, A. Mason, Y. Suhail, K. Thomson, and A. Kamboh "A scalable wavelet transform VLSI architecture for real-time neural signal processing in multichannel cortical implants," IEEE Tran. on Circuits and Systems I, vol. 54, no. 6, pp. 1266-1278, Jun. 2007.
7. A. M. Kamboh, M. Raetz, K. G. Oweiss, A. Mason, "Area-power efficient VLSI implementation of multichannel DWT for data compression in implantable neuroprosthetics," IEEE Trans. on Biomed. Circuits. and Systems, vol. 1, no. 2, pp. 128-135, Jun. 2007.
8. A. M. Kamboh, A. Mason, and K. G. Oweiss, "Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics," Journal of Signal Processing Systems, vol. 52, no. 3, pp. 249-261, Sep. 2008.
9. http://vcag.ecen.okstate.edu/projects/scells/, Standard cells library, Oklahoma State University.