A generalization of Dijkstra's shortest path algorithm with applications to VLSI routing

Journal of Discrete Algorithms

Volumn 7, Issue 4, 2009, Pages 377-390

  Peyer, Sven ^a   Rautenbach, Dieter ^b   Vygen, Jens ^a  

^a UNIVERSITY OF BONN   (Germany)

^b ILMENAU UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

Dijkstra's algorithm; Physical design; VLSI routing

Indexed keywords

DETAILED MODELS; DIJKSTRA'S ALGORITHM; DIJKSTRA'S ALGORITHMS; DIJKSTRA'S SHORTEST PATH ALGORITHM; EDGE LENGTH; GOAL-ORIENTED; INDUSTRIAL CHIPS; LEADING EDGE; PARTIAL GRID; PHYSICAL DESIGN; ROUTING TOOLS; RUNNING TIME; SHORTEST PATH; SHORTEST PATH PROBLEM; SPEED-UPS; SUBGRAPHS; VLSI ROUTING;

ELECTRONIC EQUIPMENT MANUFACTURE; ROUTING ALGORITHMS; WIRELESS SENSOR NETWORKS;

GRAPH THEORY;

EID: 70349775640     PISSN: 15708667     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.jda.2007.08.003     Document Type: Article

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