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Volumn , Issue , 2009, Pages 1749-1753
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Flexible and ultra-thin embedded chip package
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Author keywords
[No Author keywords available]
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Indexed keywords
BUILD-UP LAYERS;
CARRIER SUBSTRATE;
CHIP PACKAGES;
CHIP TECHNOLOGY;
CURVATURE RADII;
ELECTRICAL INTERCONNECTIONS;
FLEXIBLE PACKAGES;
FLEXIBLE SUBSTRATE;
KEY TOPICS;
LAMINATION PROCESS;
MECHANICAL GRINDING;
METALLIZATIONS;
NOVEL PROCESS;
PATTERNING PROCESS;
PLASMA TREATMENT;
SEMICONDUCTOR CHIPS;
STATIC AND DYNAMIC;
ULTRA-THIN;
ULTRA-THIN CHIPS;
VIA DRILLING;
BENDING TESTS;
GRINDING (COMMINUTION);
GRINDING (MACHINING);
MECHANICAL PROPERTIES;
PLASMA APPLICATIONS;
POLYIMIDES;
SUBSTRATES;
TECHNOLOGY;
PACKAGING;
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EID: 70349655232
PISSN: 05695503
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ECTC.2009.5074252 Document Type: Conference Paper |
Times cited : (15)
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References (7)
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