High-level synthesis: Past, present, and future

IEEE Design and Test of Computers

Volumn 26, Issue 4, 2009, Pages 18-25

  Martin, Grant ^a   Smith, Gary ^b  

^a Tensilica Inc   (United States)

^b Gary Smith EDA   (United States)

Author keywords

Algorithm design and analysis; Application specific integrated circuits; Behavioral synthesis; Commercial use; Companies; Design and test; Digital signal processing; ESL synthesis; Field programmable gate arrays; Graphics; High level synthesis; History; Software

Indexed keywords

ALGORITHM DESIGN AND ANALYSIS; BEHAVIORAL SYNTHESIS; COMMERCIAL USE; COMPANIES; ESL SYNTHESIS; GRAPHICS; HIGH-LEVEL SYNTHESIS; SOFTWARE;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SOFTWARE; DIGITAL INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUITS; LOGIC GATES; PHOTOLITHOGRAPHY; SIGNAL PROCESSING;

DESIGN;

EID: 69949153369     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2009.83     Document Type: Article

References (12)

1. R. Gupta and F. Brewer, "High-Level Synthesis: A Retrospective," High-Level Synthesis: From Algorithm to Digital Circuit, P. Coussy and A. Morawiec, eds., Springer, 2008, chapter 2.
2. P. Coussy and A. Morawiec, eds., High-Level Synthesis: From Algorithm to Digital Circuit, Springer, 2008.
3. A. Parker et al., "The CMU Design Automation System - An Example of Automated Data Path Design," Proc. Design Automation Conf.. (DAC 79), ACM Press, pp. 73-80.
4. P.G. Paulin and J.P. Knight, "Force-Directed Scheduling for the Behavioral Synthesis of ASICs," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 8, no. 6, 1989, pp. 661-679. According to Google Scholar, consulted 13 September 2008, this paper has been cited 648 times. Other HLS-related papers by these authors, in Proc. DAC 1986, Proc. DAC 1987, Proc. DAC 1989, and IEEE Design and Test 1989 have been cited another 462 times according to Google Scholar. A more conservative test using Microsoft China's Libra database finds 339 citations for the same set of papers.
5. D. Gajski et al., High Level Synthesis: An Introduction to Chip and System Design, Kluwer (now Springer), 1992.
6. G. De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.
7. R. Camposano and W. Wolf, eds., High-Level VLSI Synthesis, Springer, 1991.
8. H. de Man et al., "Cathedral-II: A Silicon Compiler for Digital Signal Processing," IEEE Design and Test, vol. 3, no. 6, 1986, pp. 13-25.
9. D. Knapp, Behavioral Synthesis: Digital System Design Using the Synopsys Behavioral Compiler, Prentice Hall, 1996.
10. J.P. Elliott, Understanding Behavioral Synthesis: A Practical Guide to High-Level Design, Kluwer (now Springer), 1999.
11. L. Pozzi, M. Vuletic, and P. Ienne, "Automatic Topology-Based Identification of Instruction-Set Extensions for Embedded Processors," Proc. Design, Automation, and Test in Europe (DATE 02), IEEE CS Press, 2002, p. 1138.
12. D. Goodwin and D. Petkov, "Automatic Generation of Application Specific Processors," Proc. Int'l Conf. Compilers, Architecture, and Synthesis for Embedded Systems (CASES 03), ACM Press, 2003, pp. 137-147.