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Volumn , Issue , 2009, Pages 146-151

A hardware accelerated semi analytic approach for fault trees with repairable components

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTIC APPROACH; COMPLEX SYSTEMS; COMPUTER POWER; COMPUTER TIME; FAULT-TREES; HARDWARE-ACCELERATED; MONTE CARLO SIMULATION METHODS; SIMULATION PROGRAM; SOFTWARE-BASED; SOFTWARE-BASED SOLUTIONS; TOP EVENT PROBABILITY;

EID: 69649098418     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/UKSIM.2009.83     Document Type: Conference Paper
Times cited : (1)

References (16)
  • 4
    • 0034155553 scopus 로고    scopus 로고
    • Developing a low-cost high-quality software tool for dynamic fault-tree analysis
    • DOI 10.1109/24.855536
    • J.B. Dugan, K.J.Sullivan, D. Coppit, "Developing a low-cost high-quality software tool for dynamic fault-tree analysis". IEEE Transactions Reliability 49(March):49-59, 2000. (Pubitemid 30912857)
    • (2000) IEEE Transactions on Reliability , vol.49 , Issue.1 , pp. 49-59
    • Dugan, J.B.1    Sullivan, K.J.2    Coppit, D.3
  • 5
    • 0035161443 scopus 로고    scopus 로고
    • Importance sampling to evaluate real-time system reliability: A case study
    • G. Durairaj, I. Koren and C.M. Krishna, "Importance Sampling to Evaluate Real-Time System Reliability: A Case Study," Simulation, vol.76, no. 3, pp. 172-183, March 2001. (Pubitemid 33067804)
    • (2001) Simulation , vol.76 , Issue.3 , pp. 172-183
    • Durairaj, G.1    Koren, I.2    Krishna, C.M.3
  • 7
    • 2442463433 scopus 로고    scopus 로고
    • FPGA-based Monte Carlo simulation for fault tree analysis
    • June
    • A. Ejlali, and S. G. Miremadi, "FPGA-based Monte Carlo Simulation for Fault Tree Analysis", Microelectronics Reliability, Vol.44, Issue: 6, pp. 1017- 1028, June 2004.
    • (2004) Microelectronics Reliability , vol.44 , Issue.6 , pp. 1017-1028
    • Ejlali, A.1    Miremadi, S.G.2
  • 9
    • 33847135227 scopus 로고    scopus 로고
    • FPGA-based fault simulator
    • DOI 10.1109/DDECS.2006.1649634, 1649634, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems
    • L. Kafka, O. Novak, "FPGA-based fault simulator" Design and Diagnostics of Electronic Circuits and systems, IEEE Volume , Issue , 0-0 0 Page(s):272 - 276. 2006. (Pubitemid 46287368)
    • (2006) 2006 IEEE Design and Diagnostics of Electronic Circuits and systems , vol.2006 , pp. 272-276
    • Kafka, L.1    Novak, O.2
  • 10
    • 84986163136 scopus 로고    scopus 로고
    • Disaster prevention and limitation: State of the art; tools and technologies
    • C. Kara-Zaitri, "Disaster prevention and limitation: state of the art; tools and technologies, " International Journal of Disaster Prevention and Management, Vol.5 No.1, pp.30- 39 .1996.
    • (1996) International Journal of Disaster Prevention and Management , vol.5 , Issue.1 , pp. 30-39
    • Kara-Zaitri, C.1
  • 11
    • 0004076053 scopus 로고
    • Reliability analysis and prediction: A methodology oriented treatment
    • The Netherlands
    • K.B. Misra, "Reliability Analysis and Prediction: A Methodology Oriented Treatment". , Elsevier Science, The Netherlands 1992.
    • (1992) Elsevier Science
    • Misra, K.B.1
  • 15
    • 33749547415 scopus 로고    scopus 로고
    • Calculating top event probability of a fault tree with many repeated events
    • DOI 10.1108/13552510610705937, Advanced reliability modeling, part II
    • T. Yuge, K. Tagami, S. Yanagi, "Calculating top event probability of a fault tree with many repeated events" Journal of Quality in Maintenance Engineering Volume 12 Issue 4 , pp. 364-372,2006. (Pubitemid 44536583)
    • (2006) Journal of Quality in Maintenance Engineering , vol.12 , Issue.4 , pp. 364-372
    • Yuge, T.1    Tagami, K.2    Yanagi, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.