Time-to-failure tree

Proceedings of the Annual Reliability and Maintainability Symposium

Volumn , Issue , 2003, Pages 148-152

  Ejlali, Alireza ^a   Miremadi, Seyyed Ghasem ^a  

^a SHARIF UNIVERSITY OF TECHNOLOGY   (Iran)

Author keywords

Fault tree; Field programmable gate arrays (FPGA); Monte Carlo simulation; Time to failure

Indexed keywords

COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; FAILURE ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; MATHEMATICAL MODELS; MONTE CARLO METHODS; TREES (MATHEMATICS);

FAUT TREE ANALYSIS; TIME TO FAILURE TREE;

RELIABILITY;

EID: 0037260857     PISSN: 0149144X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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