A controller area network bus transceiver behavioral model for network design and simulation

IEEE Transactions on Industrial Electronics

Volumn 56, Issue 9, 2009, Pages 3762-3771

  Prodanov, William ^a   Valle, Maurizio ^b   Buzas, Roman ^c  

^a FEDERAL UNIVERSITY OF SANTA CATARINA   (Brazil)

^b UNIVERSITY OF GENOA   (Italy)

^c ON SEMICONDUCTOR   (United States)

Author keywords

Behavioral modeling and simulation; CAN bus transceivers and networks; Controller Area Network (CAN); Fault simulation and analysis; Mixed signal integrated circuits; Signal integrity analysis; VHDL AMS

Indexed keywords

BEHAVIORAL MODELING AND SIMULATION; CAN BUS TRANSCEIVERS AND NETWORKS; CONTROLLER AREA NETWORK (CAN); FAULT SIMULATION AND ANALYSIS; MIXED-SIGNAL INTEGRATED CIRCUITS; SIGNAL INTEGRITY ANALYSIS; VHDL-AMS;

ARCHITECTURAL DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; CONTROL SYSTEM SYNTHESIS; CONTROLLERS; INTEGRATED CIRCUITS; PROCESS CONTROL; QUALITY ASSURANCE; SCADA SYSTEMS; SIMULATORS; SYSTEMS ANALYSIS; TRANSCEIVERS;

ELECTRIC NETWORK ANALYSIS;

EID: 69349097976     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2009.2025298     Document Type: Article

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