An energy-efficient AES-CCM implementation for IEEE802.15.4 wireless sensor networks

Proceedings - International Conference on Networks Security, Wireless Communications and Trusted Computing, NSWCTC 2009

Volumn 2, Issue , 2009, Pages 394-397

  Huai, Lian ^a   Zou, Xuecheng ^a   Liu, Zhenglin ^a   Han, Yu ^a  

^a HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (China)

Author keywords

AES; CCM; Energy efficient; WSN

Indexed keywords

AES; CCM; DATA PATHS; DUTY CYCLES; ENERGY-EFFICIENT; HARDWARE IMPLEMENTATIONS; IEEE 802.15.4; KEY EXPANSION; NETWORKING TECHNOLOGY; POWER CONSUMPTION; RESOURCE-CONSTRAINED; SECURITY ISSUES; WSN;

COMPUTER SCIENCE; ENERGY EFFICIENCY; HARDWARE; MICROELECTRONICS; SENSOR NETWORKS; WIRELESS TELECOMMUNICATION SYSTEMS;

WIRELESS SENSOR NETWORKS;

EID: 67650484039     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NSWCTC.2009.246     Document Type: Conference Paper

References (10)

1. J.L. Zheng, M. J. Lee, "Will IEEE802.15.4 make ubiquitous networking a reality?: A discussion on a potential low power, low bit rate standard," IEEE Communication Magazine, IEEE Press, 2004(42), pp. 140-146.
2. FIPS-197: Advanced Encryption Standard, National Institute of Standards and Technology (NIST), 2001, Available: online at http://www.itl.nist.gov/ fipspubs/.
3. Chipcon 2004 CC2420 datasheet [online]. Available: http://www.chipcon. com/files/CC2420-Data-Sheet-1-3.pdf.
4. E. L. Trejo, F. R. Henriquez, "An FPGA implementation of CCM mode using AES," Proc. Information Security and Cryptography (ICISC2005), Seoul, Korea: Springer-verlag, 2006, pp. 322-334.
5. P. Hämäläinen, T.Alho, M.Hännikäinen, "Design and implementation of low-area and low-power AES encryption hardware core," Proc. 9th Euromicro Conferance Digital System Design (DSD2006), Cavtat, Croatia: IEEE Press, 2006, pp. 577-583.
6. J. Wolkerstorfer, E. Oswald, and M. Lamberger, "An ASIC implementation of the AES S-boxes," Proc. The Cryptographer's Track at the RSA Conference (CTRSA2002), San Jose, CA, USA: Springer-verlag, 2002, pp. 67-78.
7. M. Feldhofer, J. Wolkerstorfer, and V. Rijmen, "AES implementation on a grain of sand," IEE Proceedings on Information Security, 2005, 152(1), pp. 13-20.
8. Y Eslami, A Sheikholeslami, P G Gulak, "An area-efficient universal cryptography processor for smart cards," IEEE Trans. VLSI Systems, 2006, 14(1), pp. 43-56.
9. P Hämäläinen, J Heikkinen, "Design of transport triggered architecture processors for wireless encryption," Proc. 9th Euromicro Conferance Digital System Design (DSD2005), Portugal: Springer-verlag, 2005, pp. 144-152.
10. M Lewis, S Simmons, "A VLSI implementation of a cryptographic processor," Proc. Canadian Conf. Electrical and Computer Engineering (CCECE2003), Montreal, Canada: Springer-verlag, 2003, pp. 821-826.