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Volumn , Issue , 2009, Pages 137-144

Ant colony optimization for power efficient routing in manhattan and non-manhattan VLSI architectures

Author keywords

[No Author keywords available]

Indexed keywords

ACO ALGORITHMS; ANT COLONY OPTIMIZATION ALGORITHMS; ANT-COLONY OPTIMIZATION; COMPLEX DESIGNS; DISTRIBUTED LEARNING; MANHATTANS; MULTIAGENT FRAMEWORK; NON-MANHATTAN; NON-MANHATTAN ROUTING; NP-HARD PROBLEM; OPTIMAL ROUTES; POWER CONSUMPTION; POWER-EFFICIENT ROUTING; PRIMARY DESIGN; RUNNING TIME; SEARCH PROCESS; SINGLE CHIPS; STATE OF THE ART; VLSI ARCHITECTURES; VLSI CHIP; VLSI TECHNOLOGY; WIRE LENGTH;

EID: 67650470588     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIS.2009.4937856     Document Type: Conference Paper
Times cited : (22)

References (39)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.