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Volumn , Issue , 2008, Pages 173-178

Refining power consumption estimations in the component based AADL design flow

Author keywords

[No Author keywords available]

Indexed keywords

COMPONENT ASSEMBLY; COMPONENT BASED; DESIGN FLOWS; MAXIMAL ERROR; MULTI-LEVEL; POWER CONSUMPTION; POWER CONSUMPTION ESTIMATION; POWER ESTIMATIONS; POWER MODEL; POWERPC; REFINING POWER CONSUMPTION; SOFTWARE COMPONENT; SPECIFICATION REFINEMENTS;

EID: 67650468948     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FDL.2008.4641441     Document Type: Conference Paper
Times cited : (20)

References (14)
  • 1
    • 43049160930 scopus 로고    scopus 로고
    • The sae architecture analysis & design language (AADL) A standard for engineering performance critical systems
    • Munich, october
    • P. Feiler, B. Lewis, and S. Vestal, "The sae architecture analysis & design language (AADL) A standard for engineering performance critical systems," in IEEE International Symposium on Computer-Aided Control Systems Design, Munich, october 2006, pp. 1206-1211.
    • (2006) IEEE International Symposium on Computer-Aided Control Systems Design , pp. 1206-1211
    • Feiler, P.1    Lewis, B.2    Vestal, S.3
  • 2
    • 67650363300 scopus 로고    scopus 로고
    • Modélisation des systèmes temps-réel embarqués pour la génération automatique d applications formellement vérifiées,
    • Ph.D. dissertation, Ecole Nationale Supérieure des Télécommunications de Paris, France
    • T. Vergnaud, "Modélisation des systèmes temps-réel embarqués pour la génération automatique d applications formellement vérifiées," Ph.D. dissertation, Ecole Nationale Supérieure des Télécommunications de Paris, France, 2006.
    • (2006)
    • Vergnaud, T.1
  • 3
    • 38049128420 scopus 로고    scopus 로고
    • Aadl-based dependability modelling
    • LAAS, Tech. Rep, 2006, number, 06209
    • A. Rugina, K. Kanoun, and M. Kaniche, "Aadl-based dependability modelling," LAAS, Tech. Rep., 2006, number = 06209.
    • Rugina, A.1    Kanoun, K.2    Kaniche, M.3
  • 5
    • 67650359472 scopus 로고    scopus 로고
    • The SPICES ITEA Project Website, Online, Available
    • The SPICES ITEA Project Website. [Online]. Available: http://www.spices-itea.org/
  • 13
    • 3042517253 scopus 로고    scopus 로고
    • Functional Level Power Analysis: An efficient approach for modeling the power consumption of complex processors
    • Paris, France, march
    • J. Laurent, N. Julien, E. Senn, and E. Martin, "Functional Level Power Analysis: An efficient approach for modeling the power consumption of complex processors," in Proc. Design Automation and Test in Europe DATE, Paris, France, march 2004.
    • (2004) Proc. Design Automation and Test in Europe DATE
    • Laurent, J.1    Julien, N.2    Senn, E.3    Martin, E.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.