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Volumn 1, Issue , 2004, Pages 666-667

Functional level power analysis: An efficient approach for modeling the power consumption of complex processors

Author keywords

[No Author keywords available]

Indexed keywords

CYCLE-ACCURATE ESTIMATION; FUNCTIONAL LEVEL POWER ANALYSIS (FLPA); POWER CONSUMPTION; SYSTEMS-ON-CHIP; ASSOCIATED TOOL; AVERAGE ERRORS; DSP APPLICATION; ESTIMATION METHODOLOGIES; FUNCTIONAL LEVEL POWER ANALYSIS; FUNCTIONAL MODEL; ITS EFFICIENCIES; PARAMETRIC MODELING;

EID: 3042517253     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268921     Document Type: Conference Paper
Times cited : (81)

References (4)
  • 1
  • 2
    • 0028722375 scopus 로고
    • Power analysis of embedded software: Afirst step towards software power minimization
    • Dec
    • V. Tiwari, S. Malik, A. Wolfe "Power analysis of embedded software: afirst step towards software power minimization." IEEE Trans. on VLSI Systems, vol.2, No 4, Dec 1994, pp. 591-593.
    • (1994) IEEE Trans. on VLSI Systems , vol.2 , Issue.4 , pp. 591-593
    • Tiwari, V.1    Malik, S.2    Wolfe, A.3
  • 3
    • 0034841273 scopus 로고    scopus 로고
    • JouleTrack - A web based tool for software energy profiling
    • June
    • A. Sinha, A. P. Chandrakasan "JouleTrack - A Web Based Tool for Software Energy Profiling", in Proc. DAC, June 2001, p220
    • (2001) Proc. DAC , pp. 220
    • Sinha, A.1    Chandrakasan, A.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.