A context-parameterized model for static analysis of execution times

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 5470 LNCS, Issue , 2009, Pages 222-241

  Rochange, Christine ^a   Sainrat, Pascal ^a  

^a UNIVERSITÉ DE TOULOUSE   (France)

Author keywords

Timing analysis; Worst case execution time

Indexed keywords

BASIC BLOCKS; DYNAMIC INSTRUCTION SCHEDULING; EXECUTION CONTEXT; EXECUTION PATHS; EXECUTION TIME; INPUT DATA; PARAMETERIZED MODEL; PROCESSOR ARCHITECTURES; SUPERSCALAR PIPELINES; TIMING ANALYSIS; UPPER BOUND; WORST-CASE EXECUTION TIME;

PIPELINES; PROGRAM COMPILERS; STATIC ANALYSIS; TIME MEASUREMENT;

COMPUTER ARCHITECTURE;

EID: 67650314194     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-00904-4_12     Document Type: Conference Paper

References (14)

1. Alt, M., Ferdinand, C., Martin, F., Wilhelm, R.: Cache Behavior Prediction by Abstract Interpretation. In: Static Analysis Symposium (1996)
2. Bate, I., Reutemann, R.: Efficient Integration of Bimodal Branch Prediction and Pipeline Analysis. In: 11th IEEE Int'l. Conf. on Embedded and Real-Time Computing Systems and Applications (2005) (Pubitemid 44462407)
3. Barre, J., Landet, C., Rochange, C., Sainrat, P.: Modeling Instruction-Level Parallelism for WCET Evaluation. In: 12th IEEE Int'l. Conf. on Embedded and Real- Time Systems and Applications (2006) (Pubitemid 47131214)
4. Casśe, H., Sainrat, P.: OTAWA, a framework for experimenting WCET computations. In: 3rd European Congress on Embedded Real-Time Software (2006)
5. Colin, A., Puaut, I.: Worst Case Execution Time Analysis for a Processor with Branch Prediction. In: Real-Time Systems, vol.18(2). Kluwer, Dordrecht (2000) (Pubitemid 30862958)
6. Engblom, J., Ermedahl, A., Sjödin, M., Gustafsson, J., Hansson, H.: Towards Industry-Strength Worst Case Execution Time Analysis. ASTEC 99/02 Report (1999)
7. Engblom, J.: Processor Pipelines and and Static Worst-Case Execution Time Analysis. Ph.D. thesis, University of Uppsala (2002)
8. Li, Y.-T.S., Malik, S.: Performance Analysis of Embedded Software using Implicit Path Enumeration. In: Workshop on Languages, Compilers, and Tools for Realtime Systems (1995)
9. Li, X., Roychoudhury, A., Mitra, T.: Modeling Out-of-Order Processors for Software Timing Analysis. In: IEEE Real-Time Systems Symposium (2004) (Pubitemid 40929909)
10. Li, X., Roychoudhury, A., Mitra, T.: Modeling out-of-order processors for WCET analysis. In: Real-Time Systems, vol.34(3). Kluwer, Dordrecht (2006) (Pubitemid 44238911)
11. Lundqvist, T., Stenström, P.: An Integrated Path and Timing Analysis Method based on Cycle-Level Symbolic Execution. In: Real-Time Systems, vol.17(2-3). Kluwer, Dordrecht (1999) (Pubitemid 30514781)
12. Thesing, S.: Safe and Precise WCET Determination by Abstract Interpretation of Pipeline Models. PhD thesis, Universität des Saarlandes (2004)
13. http://archi.snu.ac.kr/realtime/benchmark/
14. Gustafsson, J.: WCET Challenge 2006. Technical Report of Märladalen University (2007)