Efficient integration of bimodal branch prediction and pipeline analysis

Proceedings - 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications

Volumn , Issue , 2005, Pages 39-44

  Bate, Iain ^a   Reutemann, Ralf ^a  

^a UNIVERSITY OF YORK   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; MICROPROCESSOR CHIPS; REAL TIME SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

BRANCH PREDICTORS; INSTRUCTION CACHES; PIPELINE ANALYSIS; WORST CASE EXECUTION TIME (WCET);

PIPELINE PROCESSING SYSTEMS;

EID: 33749059963     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RTCSA.2005.41     Document Type: Conference Paper

References (10)

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