Adder and multiplier design in quantum-dot cellular automata

IEEE Transactions on Computers

Volumn 58, Issue 6, 2009, Pages 721-727

  Cho, Heumpil ^a   Swartzlander Jr , Earl E ^b  

^a QUALCOMM INC   (United States)

^b The University of Texas at Austin   (United States)

Author keywords

Adder; Carry delay multiplier; Carry flow adder; Multiplier; Quantum dot cellular automata (QCA)

Indexed keywords

ADDER DESIGN; BASIC ELEMENTS; BUILDING BLOCK; CARRY DELAY MULTIPLIER; CARRY FLOW ADDER; CONVENTIONAL DESIGN; DESIGN TRADEOFF; LOWER-POWER CONSUMPTION; MULTIPLIER; MULTIPLIER DESIGN; PARALLEL MULTIPLIERS; QUANTUM DOT CELLULAR AUTOMATA; QUANTUM-DOT CELLULAR AUTOMATA (QCA); SIMPLE CELL;

CELLULAR AUTOMATA; DESIGN; FREQUENCY MULTIPLYING CIRCUITS; MULTIPLYING CIRCUITS; PATTERN RECOGNITION SYSTEMS; ROBOTS; SEMICONDUCTOR QUANTUM DOTS; SEQUENTIAL MACHINES; TRANSLATION (LANGUAGES);

ADDERS;

EID: 66049148157     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2009.21     Document Type: Article

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