-
1
-
-
0004064629
-
-
Tata McGraw hill, New Delhi, ISBN 0-07-463529-8
-
Bose N. K., Liang P., "Neural Network Fundamentals with graphs, algorithms and Application", Tata McGraw hill, New Delhi, 2002, ISBN 0-07-463529-8
-
(2002)
Neural Network Fundamentals with Graphs, Algorithms and Application
-
-
Bose, N.K.1
Liang, P.2
-
3
-
-
0026866360
-
A Modular T-Mode Design Approach for Analog Neural Network Hardware Implementations
-
May
-
Bernabe Linares-Barranco et al.,"A Modular T-Mode Design Approach for Analog Neural Network Hardware Implementations", IEEE Journal of Solid-state Circuits. Vol. 27, no. 5, May 1992, pp. 701-713
-
(1992)
IEEE Journal of Solid-state Circuits
, vol.27
, Issue.5
, pp. 701-713
-
-
Linares-Barranco, B.1
-
5
-
-
0029752302
-
Classification of Neural Network Hardware
-
IDG Co.
-
Isik Aybay et al, "Classification of Neural Network Hardware", Neural Network World, IDG Co.,Vol 6 No 1, 1996, pp. 11-29
-
(1996)
Neural Network World
, vol.6
, Issue.1
, pp. 11-29
-
-
Aybay, I.1
-
6
-
-
0010226026
-
-
PhD thesis California institute of technology, Pasadena, California
-
Vincent F. Koosh "Analog Computation and Learning in VLSI" PhD thesis California institute of technology, Pasadena, California.2001
-
(2001)
Analog Computation and Learning in VLSI
-
-
Koosh, V.F.1
-
12
-
-
84856511655
-
Weak Inversion In Analog And Digital Circuits
-
CCCD Workshop 2003, Lund, Oct. 2-3
-
Eric A.Vittoz, "Weak Inversion In Analog And Digital Circuits" CCCD Workshop 2003, Lund, Oct. 2-3
-
-
-
Vittoz, E.A.1
-
13
-
-
0026866963
-
A VLSI Neural Processor for Image Data Compression using Self-Organisation Networks
-
May
-
Wai-Chi Fang et al, "A VLSI Neural Processor for Image Data Compression using Self-Organisation Networks" IEEE Transactions on Neural Networks, Vol. 3, No. 3, May 1992, pp. 506-517
-
(1992)
IEEE Transactions on Neural Networks
, vol.3
, Issue.3
, pp. 506-517
-
-
Fang, W.-C.1
-
14
-
-
0036963696
-
A Learnable Cellular Neural Network Structure With Ratio Memory For Image Processing
-
December
-
Chung-Yu, Chiu-Hung Cheng, "A Learnable Cellular Neural Network Structure With Ratio Memory For Image Processing", IEEE Transaction on Circuits and Systems-1, Vol. 49, No. 12, December 2002, pp. 1713-1723
-
(2002)
IEEE Transaction on Circuits and Systems-1
, vol.49
, Issue.12
, pp. 1713-1723
-
-
Chung-Yu1
Cheng, C.-H.2
-
15
-
-
0141485506
-
VLSI Implementation of Threshold Logic - A comprehensive Survey
-
September
-
Valeriu Beiu, Jose M. Quintana and Maria J. Avedillo, "VLSI Implementation of Threshold Logic - A comprehensive Survey", IEEE Transactions on Neural Networks, Vol. 14, No. 5, September 2003, pp. 1217-1243
-
(2003)
IEEE Transactions on Neural Networks
, vol.14
, Issue.5
, pp. 1217-1243
-
-
Beiu, V.1
Quintana, J.M.2
Avedillo, M.J.3
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