Application specific non-volatile primary memory for embedded systems

Embedded Systems Week 2008 - Proceedings of the 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008

Volumn , Issue , 2008, Pages 31-36

  Lee, Kwangyoon ^a   Orailoglu, Alex ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATIONS; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; INTEGRATED CIRCUITS; LIFE CYCLE; NAND CIRCUITS; SECURITY OF DATA; SEMICONDUCTOR QUANTUM DOTS;

ADDRESS SPACES; APPLICATION REQUIREMENTS; APPLICATION SPECIFICS; BEHAVIORAL ANALYSIS; CRITICAL COMPONENTS; CYCLE TIME; DATA MANAGEMENTS; DATA STORAGES; DYNAMIC DATUM; FLASH-MEMORIES; HETEROGENEOUS MEMORIES; MEMORY ACCESS; MEMORY ARCHITECTURES; MEMORY SUBSYSTEMS; MODERN EMBEDDED SYSTEMS; NAND FLASH MEMORIES; NAND FLASHES; NON VOLATILES; NON VOLATILITIES; PERFORMANCE DETERIORATIONS; PRIMARY MEMORIES; PROGRAM/ERASE; PROPOSED ARCHITECTURES; RUN-TIME; WORKLOAD ANALYSIS;

FLASH MEMORY;

EID: 63349094621     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1450135.1450144     Document Type: Conference Paper

References (8)

1. J. In, I. Shin, and H. Kim. SWL: a search-while-load demand paging scheme with NAND flash memory. In LOTES '07: Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools, pages 217-226, 2007.
2. Y. Joo, Y. Choi, C. Park, S. W. Chung, E. Chung, and N. Chang. Demand paging for OneNAND™Flash eXecute-In-Place. In CODES+ISSS '06: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, pages 229-234, 2006.
3. B. Kim, S. Cho, and Y. Choi. OneNAND™: A high performance and low power memory solution for code and data storage. In Proceedings of 20th Non-Volatile Semiconductor Workshop, 2004.
4. P. R. Panda, F. Catthoor, N. D. Dutt, K. Danckaert, E. Brockmeyer, C. Kulkarni, A. Vandercappelle, and P. G. Kjeldsberg. Data and memory optimization techniques for embedded systems. ACM Transactions on Design Automation of Electronic Systems, 6(2):149-206, 2001.
5. C. Park, J. Lim, K. Kwon, J. Lee, and S. L. Min. Compiler-assisted demand paging for embedded systems with flash memory. In EMSOFT '04: Proceedings of the 4th ACM International Conference on Embedded Software, pages 114-124, 2004.
6. C. Park, J. Seo, S. Bae, H. Kim, S. Kim, and B. Kim. A low-cost memory architecture with NAND XIP for mobile embedded systems. In CODES+ISSS '03: Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pages 138-143, 2003.
7. P. Petrov and A. Orailoglu. Energy frugal tags in reprogrammable I-caches for application-specific embedded processors. In CODES '02: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, pages 181-186, 2002.
8. P. Petrov and A. Orailoglu. A reprogrammable customization framework for efficient branch resolution in embedded processors. ACM Transactions on Embedded Computing Systems, 4(2):452-468, 2005.