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Volumn 4, Issue 2, 2005, Pages 452-468

A Reprogrammable Customization Framework for Efficient Branch Resolution in Embedded Processors

Author keywords

Branch resolution; Design; Performance; pipeline organization

Indexed keywords


EID: 52349100827     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/1067915.1067924     Document Type: Article
Times cited : (4)

References (15)
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    • Lee, L. H., Scott, J., Moyer, B., Arends, J., 1999. Low-cost branch folding for embedded applications with small tight loops. In 32nd MICRO. 103-111.
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    • Lee, L.H.1    Scott, J.2    Moyer, B.3    Arends, J.4
  • 9
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    • Combining Branch Predictors
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  • 10
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    • July
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.