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Volumn 16, Issue 8, 2009, Pages 227-234
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Engineering substrates for 3d integration of iii-v and CMOS
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Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
CUTOFF FREQUENCY;
FIELD EFFECT TRANSISTORS;
GERMANIUM COMPOUNDS;
III-V SEMICONDUCTORS;
INDIUM PHOSPHIDE;
SEMICONDUCTING GERMANIUM;
SEMICONDUCTING INDIUM PHOSPHIDE;
THREE DIMENSIONAL INTEGRATED CIRCUITS;
WAFER BONDING;
3-D INTEGRATION;
COMPOUND SEMICONDUCTORS;
DIRECT GROWTH;
GERMANIUMS (GE);
MONOLITHIC INTEGRATION;
OPTIMAL CIRCUIT;
PEAK CURRENTS;
TEMPLATE LAYERS;
SILICON WAFERS;
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EID: 63149182948
PISSN: 19385862
EISSN: 19386737
Source Type: Conference Proceeding
DOI: 10.1149/1.2982873 Document Type: Conference Paper |
Times cited : (6)
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References (5)
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