A Z4Gbps 0.57pJ/bit process-voltage-temperature variation tolerant all-digital true random number generator in 45nm CMOS

Proceedings: 22nd International Conference on VLSI Design - Held Jointly with 7th International Conference on Embedded Systems

Volumn , Issue , 2009, Pages 301-306

  Srinivasan, Suresh ^a   Mathew, Sanu ^b   Erraguntla, Vasantha ^a   Krishnamurthy, Ram ^b  

^a INTEL TECHNOLOGY INDIA PVT LTD   (India)

^b Circuits Research Lab   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUITS; NUMBER THEORY; RANDOM NUMBER GENERATION;

CMOS TECHNOLOGIES; DIGITAL COMPONENTS; PROCESS VARIATIONS; RANDOM NUMBER GENERATORS; ROBUST OPERATIONS; RUN-TIME; TEMPERATURE FLUCTUATIONS; TEMPERATURE VARIATIONS; TOTAL ENERGY CONSUMPTION; TUNING MECHANISMS;

EMBEDDED SYSTEMS;

EID: 62949140803     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.Design.2009.69     Document Type: Conference Paper

References (11)

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