Evolutionary design of combinational logic circuits using VRA processor

IEICE Electronics Express

Volumn 6, Issue 3, 2009, Pages 141-147

  Wang, Jin ^a   Lee, Chong Ho ^a  

^a Inha University   (South Korea)

Author keywords

Evolvable hardware; Self adaptive mutation rate control; Two stage evolution; VRA

Indexed keywords

ADAPTIVE ALGORITHMS; ELECTRON TUBES; IMAGE CODING; LOGIC DESIGN; SWITCHING CIRCUITS;

ALGORITHM PERFORMANCE; AUTOMATIC SYNTHESIS; COMBINATIONAL LOGIC CIRCUITS; COMPUTATIONAL EFFORTS; ELECTRONIC CIRCUITS; EVOLUTIONARY DESIGNS; EVOLUTIONARY PROCESS; EVOLVABLE HARDWARE; FUNCTIONAL CIRCUITS; NUMBER OF GATES; RE-CONFIGURABLE ARCHITECTURES; SELF-ADAPTIVE MUTATION RATE CONTROL; TWO-STAGE EVOLUTION; VRA; XILINX FPGA;

LOGIC CIRCUITS;

EID: 61349195186     PISSN: None     EISSN: 13492543     Source Type: Journal    
DOI: 10.1587/elex.6.141     Document Type: Article

References (6)

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